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| general description the MAX7347/max7348/max7349 i 2 c interfaced periph- erals provide microprocessors with management of up to 64 key switches. key inputs are monitored statically, not dynamically scanned, to ensure low-emi operation. the MAX7347 can monitor up to 24 switches, the max7348 can monitor up to 40 switches, and the max7349 can monitor up to 64 switches. the switches can be metallic or resistive (carbon) up to 1k . the key controller debounces and maintains a fifo of key-press events (including autorepeat, if enabled). an interrupt ( int ) output can be configured to alert key presses either as they occur, or at maximum rate. the max7348/max7349 feature a tone generator to generate automatic key-click sounds or alarm tones under processor control. the sounder frequencies cover the 5th musical octave (523.25hz to 987.77hz), plus seven other musical notes up to 2637hz. the output can also be pro- grammed to be high or low for the sound duration to operate an electronic sounder, relay, or lamp. the MAX7347 is offered in 16-pin qsop and tqfn packages. the max7348 is offered in a 20-pin qsop package. the max7349 is available in 24-pin qsop and tqfn packages. the MAX7347/max7348/max7349 operate over the -40? to +125? temperature range. applications medical instruments instrumentation panels security and access industrial controls features ? 400kbps, 5.5v-tolerant 2-wire serial interface ? 2.4v to 3.6v operation ? monitor up to 64 keys (max7349), 40 keys (max7348), or 24 keys (MAX7347) ? fifo queues up to 8 debounced key events ? key debounce time user configurable from 9ms to 40ms ? key autorepeat rate and delay user configurable ? low-emi design uses static matrix monitoring ? hardware interrupt on each debounced event or fifo level, or at end of definable time period ? up to six open-drain logic outputs available capable of driving leds ? sounder output generates automatic key clicks ? 14 programmable musical sounder frequencies ? continuous or programmable sounder duration ? easy automatic single-tone and dual-tone alarm sound generation ? four i 2 c address choices ? selectable 2-wire serial bus timeout ? under 10 a shutdown current MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers ________________________________________________________________ maxim integrated products 1 ordering information 19-3556; rev 5; 5/07 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. evaluation kit available part temp range pin- package pkg code MAX7347 aee+ -40 c to +125 c 16 qsop e16-4 MAX7347ate+ -40 c to +125 c 16 tqfn-ep* t1644-4 max7348 aep+ -40 c to +125 c 20 qsop e20-1 max7349 aeg+ -40 c to +125 c 24 qsop e24-1 max7349atg+ -40 c to +125 c 24 tqfn-ep* t2444-4 + denotes lead-free package. * ep = exposed paddle. max7349 v+ col_ sounder gnd 8 scl sda ad0 alert row_ 8 piezo transducer switch array, up to 64 switches input 2.4v to 3.6v int typical application circuit pin configurations appear at end of data sheet.
MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. (all voltages referenced to gnd.) v+ ............................................................................-0.3v to +4v col2/port2?ol7/port7 ....................................-0.3v to +4v sda, scl, ad0, alert, int ....................................-0.3v to +6v all other pins................................................-0.3v to (v+ + 0.3v) dc current on col2/port2?ol7/port7 ......................25ma dc current on sounder ................................................?5ma gnd current .......................................................................80ma continuous power dissipation (t a = +70?) 16-pin qsop (derate 8.3mw/? above +70?)...........666mw 16-pin tqfn (derate 16.9mw/? above +70?).......1349.1mw 20-pin qsop (derate 9.1mw/? above +70?)...........727mw 24-pin qsop (derate 9.5mw/? above +70?)...........761mw 24-pin tqfn (derate 20.8mw/? above +70?).......1666.7mw operating temperature range (t min to t max ) ...-40? to +125? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? electrical characteristics (v+ = 2.4v to 3.6v, t a = t min to t max , unless otherwise noted. typical values are at v+ = 3.3v, t a = +25?.) (notes 1, 2) parameter symbol conditions min typ max units operating supply voltage v+ 2.4 3.6 v operating supply current i+ all key switches open 75 100 ? shutdown supply current i sh 6.44 10 ? sounder output high voltage v ohbuz i source = 10ma v+ - 0.45 v sounder output low voltage v olbuz i sink = 10ma 0.15 v sounder frequency accuracy t a = +25?, v+ = 3.3v 1.2 % key-switch source current i key 28 40 ? key-switch source voltage v key 0.35 0.65 v key-switch resistance r key (note 3) 1 k startup time from shutdown t start 57 200 ? output low voltage col2/port2 to col7/port7, int output v olport i sink = 10ma 0.15 v input voltage v+ -1 +1 input leakage current alert input voltage > v+ -5 +5 ? input high voltage alert v ih 2.2 v input low voltage alert v il 0.8 v serial-interface specifications serial bus timeout t out with bus timeout enabled 20 68 ms input high voltage sda, scl, ad0 v ih 2.2 v input low voltage sda, scl, ad0 v il 0.6 v input voltage v+ -1 +1 input leakage current sda, scl, ad0 input voltage > v+ -5 +5 ? MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers _______________________________________________________________________________________ 3 i 2 c timing characteristics (v+ = 2.4v to 3.6v, t a = t min to t max , unless otherwise noted. typical values are at v+ = 3.3v, t a = +25?.) (notes 1, 2) parameter symbol conditions min typ max units input capacitance (scl, sda, ad0) c in (notes 3, 4) 10 pf with bus timeout enabled 0.05 400 scl serial clock frequency f scl with bus timeout disabled 0 400 khz bus free time between a stop and a start condition t buf 1.3 ? hold time (repeated) start condition t hd , sta 0.6 ? repeated start condition setup time t su , sta 0.6 ? stop condition setup time t su , sto 0.6 ? data hold time t hd , dat (note 5) 0.9 ? data setup time t su , dat 100 ns scl clock low period t low 1.3 ? scl clock high period t high 0.7 ? rise time of both sda and scl signals, receiving t r (notes 3, 4) 20 + 0.1c b 300 ns fall time of both sda and scl signals, receiving t f (notes 3, 4) 20 + 0.1c b 300 ns fall time of sda transmitting t f.tx (notes 3, 6) 20 + 0.1c b 250 ns pulse width of spike suppressed t sp (notes 3, 7) 50 ns capacitive load for each bus line c b (note 3) 400 pf note 1: all parameters are tested at t a = +25?. specifications over temperature are guaranteed by design. note 2: all digital inputs at v+ or gnd. note 3: guaranteed by design. note 4: c b = total capacitance of one bus line in pf. t r and t f measured between 0.8v and 2.1v. note 5: a master device must provide a hold time of at least 300ns for the sda signal (referred to v il of the scl signal) to bridge the undefined region of scl? falling edge. note 6: i sink 6ma. c b = total capacitance of one bus line in pf. t r and t f measured between 0.8v and 2.1v. note 7: input filters on the sda, scl, and ad0 inputs suppress noise spikes less than 50ns. MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers 4 _______________________________________________________________________________________ gpo output low voltage vs. sink current MAX7347 toc01 i sink (ma) v ol (mv) 20 15 10 5 50 100 150 200 250 300 0 025 v+ = 2.4v t a = +125 c t a = +25 c t a = -40 c gpo output low voltage vs. sink current MAX7347 toc02 i sink (ma) v ol (mv) 20 15 10 5 50 100 150 200 250 300 0 025 v+ = 3v t a = +125 c t a = +25 c t a = -40 c gpo output low voltage vs. sink current MAX7347 toc03 i sink (ma) v ol (v) 20 15 10 5 50 100 150 200 250 300 0 025 v+ = 3.6v t a = +125 c t a = +25 c t a = -40 c supply current vs. supply voltage MAX7347 toc04 supply voltage (v) supply current ( a) 3.4 3.2 2.6 2.8 3.0 45 50 55 60 65 70 75 80 85 90 40 2.4 3.6 t a = +125 c t a = +25 c t a = -40 c key-switch source current vs. supply voltage MAX7347 toc05 supply voltage (v) key-switch source current ( a) 3.4 3.2 2.6 2.8 3.0 25 26 27 28 29 30 24 2.4 3.6 t a = +125 c col0 = gnd t a = +25 c t a = -40 c sounder frequency vs. supply voltage MAX7347 toc06 supply voltage (v) sounder frequency (hz) 3.3 2.7 3.0 876 878 880 882 884 886 874 2.4 3.6 sounder frequency configured for 880hz t a = +125 c t a = +25 c t a = -40 c sounder output MAX7347 toc07 3v 0v v sounder 1v/div 200 s/div oscillator frequency vs. supply voltage MAX7347 toc08 supply voltage (v) oscillator frequency (khz) 3.3 2.7 3.0 61 62 63 64 65 60 2.4 3.6 oscillator frequency vs. temperature MAX7347 toc09 temperature ( c) oscillator frequency (khz) 110 10 60 61 62 63 64 65 60 -40 typical operating characteristics (v+ = 3.3v, t a = +25?, unless otherwise noted. supply range for v+ is 2.4v to 3.6v. temperature range is -40? to +125?.) MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers _______________________________________________________________________________________ 5 detailed description the MAX7347/max7348/max7349 are microprocessor peripherals that combine a low-noise key-switch inter- face with a piezo sounder controller. up to 64 key switches can be monitored and debounced with optional autorepeat, and the key events are presented in an eight-deep fifo. key-switch functionality can be traded to provide up to one (MAX7347), three (max7348), or six (max7349) open-drain logic outputs. (table 1). the piezo sounder controller generates a variety of audio tones. tones are programmable for frequency and duration, and may be intermittent, two tone, or con- tinuous. the piezo sounder controller can be config- ured to deliver an automatic, customizable sound on every key press to provide a udible key-click feedback. interrupt requests can be configured to be issued on every key-press event, or can be limited to a maximum rate to prevent overloading the microprocessor with pin description pin MAX7347 (qsop) MAX7347 (tqfn) max7348 max7349 (qsop) max7349 (tqfn) name function 1 15 1 2 23 row0 row input from key matrix. leave open circuit if unused. 2 16 2 3 24 row1 row input from key matrix. leave open circuit if unused. 3 1 3 4 1 row2 row input from key matrix. leave open circuit if unused. 4 2 4 5 2 row3 row input from key matrix. leave open circuit if unused. 5 3 7 8 5 row4 row input from key matrix. leave open circuit if unused. 6 4 8 9 6 row5 row input from key matrix. leave open circuit if unused. 7 5 9 10 7 row6 row input from key matrix. leave open circuit if unused. 8 6 10 11 8 row7 row input from key matrix. leave open circuit if unused. 9 7 11 14 11 col2/port2 column output to key matrix or gpo 10 8 12 15 12 col1 column output to key matrix 11 9 13 16 13 col0 column output to key matrix 12 10 15 18 15 gnd ground 13 11 17 20 17 sda i 2 c-compatible serial data i/o 14 12 18 21 18 scl i 2 c-compatible serial clock input 15 13 19 22 19 int active-low interrupt output. output is open drain. 16 14 20 23 20 v+ positive supply voltage. bypass v+ to gnd with a 0.047? or higher ceramic capacitor. 5 6 3 col3/port3 column output to key matrix or gpo 6 7 4 col4/port4 column output to key matrix or gpo 14 17 14 sounder s ound er d r i ver outp ut. typ i cal l y connect a p i ezo- cer am i c sound er or other tr ansd ucer fr om thi s outp ut to g r ound . o utp ut i s p ush- p ul l . 161916 ad0 address input 0. sets device slave address. connect to gnd, v+, sda, or scl to give four logic combinations. see table 3. 1 22 col7/port7 column output to key matrix or gpo 12 9 col6/port6 column output to key matrix or gpo 13 10 col5/port5 column output to key matrix or gpo 24 21 alert alert input. connect to gnd or v+ if unused. ?p ep ep e xp osed p ad d l e. inter nal l y connected to gn d . c onnect to a l ar g e g r ound p l ane to m axi m i ze ther m al p er for m ance. MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers 6 _______________________________________________________________________________________ too many interrupts. the key-switch status can be checked at any time by reading the key-switch fifo. a 1-byte read access returns both the first key-press event in the fifo (if there is one) and the fifo status, so it is easy to operate the MAX7347/max7348/ max7349 by polling. if the int pin is not required, it can be configured as an open-drain general-purpose output (gpo) capable of driving an led. the max7349 monitors up to 64 keys. the max7348 monitors up to 40 keys. the MAX7347 monitors up to 24 keys (table 1). if the application requires fewer keys to be scanned, up to six of the key-switch outputs can be configured as open-drain gpos capable of driving leds. for each key-switch output used as a gpo, the number of key switches that can be scanned is reduced by eight. an alert logic input (max7349 only) can be configured to deliver an automatic, customizable sound and/or an interrupt on every falling edge of the logic input. the logic state of the alert input can be read at any time. tone generator the piezo sounder controller generates a square wave with the frequency of a musical tone under processor con- trol. the selection of tones covers the 5th musical octave (523.25hz to 987.77hz), plus seven other notes up to 2637hz. the sounder output is also programmable to be either high or low for the entire sound duration to operate an electronic sounder, relay, or lamp instead of a piezo transducer. the sound duration is programmable from 15.625ms in seven binary steps up to a maximum of 1s. the piezo sounder controller interface uses a single 1- byte access to its own separate slave address. commands are double-buffered to allow two commands (2 bytes) to be stored and executed in succession. the sounder controller performs the transition between queued sound commands without click artifacts. the controller can also autoloop between the two most recent commands. autolooping allows a wide range of intermittent and two-tone sounds to be initiated, and then run automatically without further intervention. key-scan controller key inputs are scanned statically, not dynamically, to ensure low-emi operation. as inputs only toggle in response to switch changes, the key matrix can be routed closer to sensitive circuit nodes. the key controller debounces and maintains a fifo of key-press events (including autorepeated key presses, if autorepeat is enabled). figure 1 shows keys order. serial interface figure 2 shows the 2-wire serial interface timing details. serial addressing the MAX7347/max7348/max7349 operate as slaves that send and receive data through an i 2 c-compatible 2-wire interface. the interface uses a serial data line (sda) and a serial clock line (scl) to achieve bidirec- tional communication between master(s) and slave(s). a master (typically a microcontroller) initiates all data transfers to and from the MAX7347/max7348/max7349 and generates the scl clock that synchronizes the data transfer. the MAX7347/max7348/max7349s?sda line operates as both an input and an open-drain output. a pullup resistor, typically 4.7k , is required on sda. the MAX7347/max7348/max7349s?scl line operates only as an input. a pullup resistor, typically 4.7k , is required on scl if there are multiple masters on the 2-wire inter- face, or if the master in a single-master system has an open-drain scl output. each transmission consists of a start condition (figure 3) sent by a master, followed by the MAX7347/ max7348/max7349 7-bit slave address plus r/ w bit, a register address byte, 1 or more data bytes, and finally a stop condition. start and stop conditions both scl and sda remain high when the interface is not busy. a master signals the beginning of a transmis- sion with a start (s) condition by transitioning sda from high to low while scl is high. when the master has finished communicating with the slave, it issues a part package- pins maximum key switches int output key- scan slave ids sounder slave ids sounder output gpos alert input max7349 24 64 yes 4 4 yes 6 + 1 ( int ) yes max7348 20 40 yes 4 4 yes 3 + 1 ( int ) MAX7347 16 24 yes 1 fixed 1 + 1 ( int ) table 1. product features table MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers _______________________________________________________________________________________ 7 stop (p) condition by transitioning sda from low to high while scl is high. the bus is then free for another transmission. bit transfer one data bit is transferred during each clock pulse (figure 4). the data on sda must remain stable while scl is high. acknowledge the acknowledge bit is a clocked 9th bit (figure 5), which the recipient uses to handshake receipt of each byte of data. thus, each byte transferred effectively requires 9 bits. the master generates the 9th clock pulse, and the recipient pulls down sda during the acknowledge clock pulse, so the sda line is stable low during the high period of the clock pulse. when the master is transmitting to the MAX7347/max7348/ max7349, the MAX7347/max7348/max7349 generate the acknowledge bit because the MAX7347/max7348/ max7349 are the recipients. when the MAX7347/ max7348/max7349 are transmitting to the master, the master generates the acknowledge bit because the master is the recipient. key 0 key 8 key 16 key 24 key 32 key 40 key 48 key 56 key 1 key 9 key 17 key 25 key 33 key 41 key 49 key 57 key 2 key 10 key 18 key 26 key 34 key 42 key 50 key 58 key 3 key 11 key 19 key 27 key 35 key 43 key 51 key 59 key 4 key 12 key 20 key 28 key 36 key 44 key 52 key 60 key 5 key 13 key 21 key 29 key 37 key 45 key 53 key 61 key 6 key 14 key 22 key 30 key 38 key 46 key 54 key 62 key 7 key 15 key 23 key 31 key 39 key 47 key 55 key 63 row0 row1 row2 row3 row4 row5 row6 row7 col0 col1 col2/port2 col3/port3* col4/port4* col5/port5** col6/port6** col7/port7** *max7348 and max7349 only. **max7349 only. figure 1. keys order MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers 8 _______________________________________________________________________________________ sda scl t hd, sta t low t high t r t f t su, dat t su, sta t su, sto t buf t hd, sta t hd, dat start condition stop condition start condition repeated start condition figure 2. 2-wire serial interface timing details sda scl start condition stop condition s p figure 3. start and stop conditions sda scl data line stable; data valid change of data allowed figure 4. bit transfer MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers _______________________________________________________________________________________ 9 slave addresses the MAX7347/max7348/max7349 have two 7-bit long slave addresses (figure 6). the bit following a 7-bit slave address is the r/ w bit, which is low for a write command and high for a read command. the first 4 bits (msbs) of the MAX7347/max7348/ max7349 slave addresses are always 0111. slave address bits a3, a2, and a1 correspond, by the matrix in table 3, to the states of the device address input ad0, and a0 corresponds to the r/ w bit. MAX7347/ max7348/max7349 use two slave addresses, one for the main key-scan controller, and one for the sounder controller. the ad0 input can be connected to any of four signals: gnd, v+, sda, or scl, giving four possible slave address pairs, allowing up to four max7348/ max7349 devices to share the bus. only one MAX7347 can share the bus. the MAX7347 ad0 input is internally connected to gnd. the MAX7347/max7348/max7349 monitor the bus continuously, waiting for a start condition followed by its slave address. when MAX7347/max7348/max7349 recognize their slave address, they acknowledge and are then ready for continued communication. pin col0 col1 col2/port2 col3/port3 col4/port4 col5/port5 col6/port6 col7/port7 row0 key 0 key 8 key 16 key 24 key 32 key 40 key 48 key 56 row1 key 1 key 9 key 17 key 25 key 33 key 41 key 49 key 57 row2 key 2 key 10 key 18 key 26 key 34 key 42 key 50 key 58 row3 key 3 key 11 key 19 key 27 key 35 key 43 key 51 key 59 row4 key 4 key 12 key 20 key 28 key 36 key 44 key 52 key 60 row5 key 5 key 13 key 21 key 29 key 37 key 45 key 53 key 61 row6 key 6 key 14 key 22 key 30 key 38 key 46 key 54 key 62 row7 key 7 key 15 key 23 key 31 key 39 key 47 key 55 key 63 table 2. key-switch mapping device address pin ad0 a7 a6 a5 a4 a3 a2 a1 a0 r/ w function 0 key-scan controller write 0 1 key-scan controller read 0 sounder controller write gnd 011100 1 1 sounder controller read 0 key-scan controller write 0 1 key-scan controller read 0 sounder controller write v+ 011101 1 1 sounder controller read 0 key-scan controller write 0 1 key-scan controller read 0 sounder controller write sda 011110 1 1 sounder controller read 0 key-scan controller write 0 1 key-scan controller read 0 sounder controller write scl 011111 1 1 sounder controller read table 3. 2-wire interface address map MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers 10 ______________________________________________________________________________________ bus timeout the MAX7347/max7348/max7349 feature a 20ms mini- mum bus timeout on the 2-wire serial interface, largely to prevent the MAX7347/max7348/max7349 from holding the sda i/o low during a read transaction if the scl hangs for any reason before a serial transaction has been completed. bus timeout operates by causing the MAX7347/max7348/max7349 to internally terminate a serial transaction, either read or write, if the time between adjacent edges on scl exceeds 20ms. after a bus time- out, the MAX7347/max7348/max7349 wait for a valid start condition before responding to a consecutive transmission. the bus timeout feature requires the serial interface to operate above 50hz bus speed. this feature can be enabled or disabled under user control by writing to the configuration register (table 12). message format for writing the key-scan controller a write to the MAX7347/max7348/max7349s?key-scan controller comprises the transmission of the MAX7347/max7348/max7349s?key-scan slave address with the r/ w bit set to zero, followed by at least 1 byte of information. the first byte of information is the command byte. the command byte determines which register of the MAX7347/max7348/max7349 is to be written by the next byte, if received. if a stop condition is detected after the command byte is received, then the MAX7347/max7348 /max7349 take no further action (figure 7) beyond stor- ing the command byte. any bytes received after the command byte are data bytes. the first data byte goes into the internal register of the MAX7347/max7348/max7349 selected by the command byte (figure 8). if multiple data bytes are transmitted before a stop condition is detected, these bytes are generally stored in subsequent MAX7347/max7348/max7349 internal registers (table 7) because the command byte address generally autoincrements (table 4). message format for reading the key-scan controller the MAX7347/max7348/max7349 are read using the MAX7347/max7348/max7349s?internally stored com- mand byte as an address pointer, the same way the stored command byte is used as an address pointer for a write. the pointer generally autoincrements after each data byte is read using the same rules as for a write (table 4). thus, a read is initiated by first configuring the MAX7347/max7348/max7349s?command byte by performing a write (figure 7). the master can now read n consecutive bytes from the MAX7347/max7348/ max7349, with the first data byte being read from the register addressed by the initialized command byte. when performing read-after-write verification, remem- ber to reset the command byte? address because the stored command byte address is generally autoincre- mented after the write (figure 9, table 4). sda scl 01 1a3a2a1 1 msb lsb ack r/w figure 6. slave address scl sda by transmitter clock pulse for acknowledge start condition sda by receiver 1 2 8 9 s figure 5. acknowledge MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers ______________________________________________________________________________________ 11 message format for writing the sounder controller a write to the MAX7347/max7348/max7349s?sounder controller comprises the transmission of the MAX7347/max7348/max7349s?sounder slave address with the r/ w bit set to zero, followed by at least 1 com- mand byte of information. the sounder controller ana- lyzes each incoming data byte, and depending on the state of the sounder controller? 2-deep fifo and the contents of the command byte, the command byte is added to the fifo or it overwrites the last fifo data item (table 16). message format for reading the sounder controller a read from the MAX7347/max7348/max7349s?sounder controller comprises the transmission of the MAX7347/max7348/max7349s?sounder slave address with the r/ w bit set to 1. the master can now read n con- secutive bytes from the MAX7347/max7348/max7349, each byte being a snapshot of the fifo status of the sounder controller (table 16). if the master wishes to poll the sounder controller until there is room for another com- mand to be sent, the master can read bytes continuously from the sounder controller until the information is satis- factory and then issue a stop condition. operation with multiple masters if the MAX7347/max7348/max7349 are operated on a 2- wire interface with multiple masters, a master reading the MAX7347/max7348/max7349 should use a repeated start between the write that sets the MAX7347/max7348/ max7349s?address pointer, and the read(s) that takes the data from the location(s). this is because it is possi- ble for master 2 to take over the bus after master 1 has set up the MAX7347/max7348/max7349s?address pointer but before master 1 has read the data. if master 2 subsequently resets the MAX7347/max7348/max7349s address pointer, then master 1? read may be from an unexpected location. register function address code (hex) autoincrement address (hex) keys fifo 0x00 0x00 debounce 0x01 0x02 autorepeat 0x02 0x03 interrupt 0x03 0x04 configuration 0x04 0x05 port 0x05 0x06 key sound 0x06 0x07 alert sound 0x07 0x00 table 4. key-scan command address autoincrement rules saap 0 slave address command byte d7 d6 d5 d4 d3 d2 d1 d0 command byte is stored on receipt of acknowledge condition acknowledge from MAX7347/max7348/max7349 acknowledge from MAX7347/max7348/max7349 r/w figure 7. command byte received saaap 0 slave address command byte data byte 1 byte autoincrement command byte address d7 d6 d5 d4 d3 d2 d1 d0 d1 d0 d3 d2 d5 d4 d7 d6 acknowledge from MAX7347/max7348/max7349 acknowledge from MAX7347/max7348/max7349 acknowledge from MAX7347/max7348/max7349 r/w figure 8. command and single data byte received MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers 12 ______________________________________________________________________________________ register data register function power-up condition address code (hex) d7 d6 d5 d4 d3 d2 d1 d0 keys fifo empty 0x00 00000000 debounce ports 2? are enabled; debounce time is 39ms 0x01 11111111 autorepeat autorepeat is disabled 0x02 00000000 interrupt int is a port, not an interrupt output 0x03 00000000 configuration shutdown mode: key sound is disabled; alert sound is disabled; alert int is disabled; timeout enabled; no sound output 0x04 00000001 ports ports 2? and int are logic-high (high impedance) 0x05 1111111x key sound key-sound default is 31.25ms of 987.77hz 0x06 01010001 alert sound key-sound default is 250ms of 2093hz 0x07 10111011 table 5. key-scan power-up configuration register data power-up condition d7 d6 d5 d4 d3 d2 d1 d0 sounder output is a general-purpose output, logic 0; queue is empty 0 0 0 0 0 0 0 0 table 6. sounder power-up configuration saaap 0 slave address command byte data byte n bytes autoincrement command byte address d7 d6 d5 d4 d3 d2 d1 d0 d1 d0 d3 d2 d5 d4 d7 d6 acknowledge from MAX7347/max7348/max7349 acknowledge from MAX7347/max7348/max7349 acknowledge from MAX7347/max7348/max7349 r/w figure 9. n data bytes received x = don? care. MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers ______________________________________________________________________________________ 13 command address autoincrementing address autoincrementing allows the MAX7347/ max7348/max7349 to be configured with fewer trans- missions by minimizing the number of times the com- mand address needs to be sent. the command address stored in the MAX7347/max7348/max7349 generally increments after each data byte is written or read (table 4). autoincrementing applies only to the key-scan command addresses and not to the sounder command addresses. registers description initial power-up on power-up, all control registers are reset and the MAX7347/max7348/max7349 enter shutdown mode (tables 5, 6). table 7 shows the register address map for the key-scan section. command address register function d15 d14 d13 d12 d11 d10 d9 d8 address code (hex) keys fifo 00000000 0x00 debounce 00000001 0x01 autorepeat 00000010 0x02 interrupt 00000011 0x03 configuration 00000100 0x04 ports 00000101 0x05 key sound 00000110 0x06 alert sound 00000111 0x07 table 7. key-scan register address map register data register address code (hex) d7 d6 d5 d4 d3 d2 d1 d0 keys fifo register* 0x00 overflow flag more flag key switch that has been debounced fifo has not overflowed 0x00 0 x x x x x x x fifo overflowed; fifo contains the first eight key events 0x00 1 x x x x x x x this key is the last fifo item (key-switch data not zero) 0x00 x 0 x x x x x x key 0 was either the last fifo item or the fifo is empty and no key has been pressed 0x00 0 0 0 0 0 0 0 0 this key is not the last fifo item 0x00 x 1 x x x x x x power-up default setting 0x00 0 0 0 0 0000 table 8. keys fifo register format * reading the key-scan fifo clears the i nt . int is only reasserted by a key event after the fifo has been emptied by read(s). MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers 14 ______________________________________________________________________________________ key-scan registers eight key-scan registers are described in the following sections. keys fifo register the keys fifo register contains the information pertain- ing to the status of the keys fifo, as well as the key- press events that have been debounced (table 8). bits d0 to d5 denote which of the 64 keys have been debounced and the keys are numbered as in table 2 and figure 1. d6 indicates whether the present debounced key is the last one in the fifo, with 1 denoting that there are more keys after the present one, and 0 denoting that the present debounced key is the last one stored in the fifo. d7 is the overflow flag, which denotes whether the keys fifo has overflowed. reading the key-scan fifo clears the interrupt int . int is only reasserted after the fifo has been emptied by performing enough read operations. debounce register the debounce register sets the time for each debounce cycle, as well as setting whether the gpo ports are enabled or disabled. bits d0 through d4 set the debounce time in increments of 1ms starting at 9ms and ending at 40ms (table 9). bits d5 through d7 set which one of the gpo ports is to be enabled. note that not any port can be enabled at a particular time. the gpo ports can be enabled only in the combinations shown in table 9, from all disabled to all enabled. autorepeat register the autorepeat register sets the autorepeat frequency (repeat rate) and its delay. the autorepeat function allows a key to be consecutively asserted when the key itself is pressed down without being released. the autorepeat delay specifies the delay between the first press and the beginning of the autorepeating, provided that the key has not been released. the autorepeat frequency specifies how fast the continuously pressed-down key to be assert- ed once autorepeating has started is. bits d0 through d3 specify the autorepeat delay in terms of debounce cycles register address code (hex) register data d7 d6 d5 d4 d3 d2 d1 d0 debounce register 0x01 ports enable debounce time debounce time is 9ms 0x01 x x x 0000 0 debounce time is 10ms 0x01 x x x 0000 1 debounce time is 11ms 0x01 x x x 0001 0 debounce time is 12ms 0x01 x x x 0001 1 all the way through to 0x01 x x x debounce time is 37ms 0x01 x x x 1110 0 debounce time is 38ms 0x01 x x x 1110 1 debounce time is 39ms 0x01 x x x 1111 0 debounce time is 40ms 0x01 x x x 1111 1 gpo ports disabled (full key-scan functionality) 0x01 0 0 0 xxxx x gpo port 7 enabled 0x01 0 0 1 xxxx x gpo ports 7 and 6 enabled 0x01 0 1 0 xxxx x gpo ports 7, 6, and 5 enabled 0x01 0 1 1 xxxx x gpo ports 7, 6, 5, and 4 enabled 0x01 1 0 0 xxxx x gpo ports 7, 6, 5, 4, and 3 enabled 0x01 1 0 1 xxxx x gpo ports 7, 6, 5, 4, 3, and 2 enabled 0x01 1 1 xxxxx x power-up default setting 0x01 1 111111 1 table 9. debounce register format MAX7347/max7348/max7349 ranging from 8 debounce cycles to 128 debounce cycles (table 10). bits d4 through d6 specify the autorepeat rate or frequency ranging from 4 to 32 debounce cycles. bit d7 specifies whether the auto-repeat function is enabled with 0 denoting autorepeat disabled and 1 denoting autorepeat enabled. interrupt register the interrupt register contains information related to the settings of the interrupt request function, as well as the status of the int output, which can also be configured as a gpo. bits d0 through d4 set the key-scan interrupt frequency. by setting bits d0 through d4 to an appropri- ate value, the interrupt can be asserted at the end of the selected number of debounce cycles (table 11). this number ranges from 1 to 31 debounce cycles. if bits d0 through d4 are set to 00000, the int output is config- ured as a gpo that is controlled by bit d6 in the ports register and the int output is not asserted. however, the int status bits d5, d6, and d7 are still set and cleared in the normal way at the end of each debounce cycle as if bits d0 through d4 were set to 00001. bits d5 and d6 denote whether an interrupt was set due to a key-scan event (bit d5) or to an alert event (bit d6). bit d7 represents whether an interrupt request has been asserted with 0 denoting no int asserted and 1 denoting that int has been asserted. the interrupt register is a read-only register and writes to it are ignored. reading the interrupt register does clear an alert event int , but does not clear a key-scan event int . an interrupt request caused by a key-scan event(s) is cleared when the fifo is emptied. configuration register the configuration register reflects the sounder status, controls the i 2 c bus timeout feature, enables the alert input interrupt feature, enables the sounder to respond to both alert input and key debounce events, and con- trols the shutdown of the device (table 12). ports register the ports register sets the values of ports 2 through 7 and the int port when configured as gpos. the settings in this register are ignored for ports not configured as gpos, and a read from this register returns the values stored in the register and not the actual port conditions (table 13). the ports register also serves to read the alert input and this is done through bit d0 with a 0 denoting a low on the alert input and a 1 denoting a high. key-sound register the key-sound register specifies the duration and fre- quency of the sound to be executed by the sounder con- troller when a key or a set of keys are debounced if the sounder output has been enabled to be set by a key debounce event in the configuration register. when this happens, the information of bits d7 through d1 is passed on to the sounder register and the appropriate sound is executed (tables 14, 16). least significant bit d0 is ignored and always set to 1 when transferred to the sounder register. see table 16 for the format of setting the frequency and duration of the sound to be executed. if a key-sound register command is sent as 000xxxx (continuous), then the command is stored as 111xxxx (1000ms) in the sounder register. alert sound register the alert sound register specifies the duration and fre- quency of the sound to be executed by the sounder con- troller at the falling edge of the alert input if the sounder output has been enabled to be set by the alert input in the configuration register. if this is the case, the informa- tion of bits d7 through d1 is passed on to the sounder register and the appropriate sound is executed (tables 15, 16). least significant bit d0 is always set to 1 and this value is ignored when transferred to the sounder register. see table 16 for the proper format of setting the frequency and duration of the sound to be executed. note that if an alert sound register command is sent as 000xxxx (continuous), then the command is actually stored as 111xxxx (1000ms) in the sounder register. sounder register the sounder register stores the frequencies and duration of the sounds to be executed by the sounder, as well as the state of its two-deep fifo (table 16). d0 denotes whether another command is lined in the queue at any given moment. a 0 in d0 denotes that the queue is empty while a 1 denotes that there is another command. by writ- ing 0 to d0, the present command is executed and the queue is cleared. when sending a command that has a d0 set to 1, the queue is checked and, if empty, the sent command is added to it while, if full, the sent command replaces the queued command. bits d0 and d1, when taken in conjunction, set the level of the sounder output when configured as a gpo and also control the autoloop function provided that the rest of the bits (d7 through d2) are set to 0. when the sounder is configured as a gpo, the levels of the output are set by d1, a 0 denoting a low and a 1 denoting a high. when d0 is set to 1 and the rest of the bits are set to 0, d1 controls the autoloop function as defined in table 16. bits d7 through d1 control the frequency and duration of the sounds to be executed by the sounder. these sounds include the musical notes of the 5th octave plus some notes from the 6th and 7th octaves as well. see table 16. 2-wire interfaced low-emi key switch and sounder controllers ______________________________________________________________________________________ 15 MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers 16 ______________________________________________________________________________________ register data register address code (hex) d7 d6 d5 d4 d3 d2 d1 d0 autorepeat register 0x02 enable autorepeat rate autorepeat delay autorepeat is disabled 0x02 0 x x x x x x x autorepeat is enabled 0x02 1 autorepeat rate autorepeat delay key-switch autorepeat delay is 8 debounce cycles 0x02 1 x x x 0000 key-switch autorepeat delay is 16 debounce cycles 0x02 1 x x x 0001 key-switch autorepeat delay is 24 debounce cycles 0x02 1 x x x 0010 key-switch autorepeat delay is 32 debounce cycles 0x02 1 x x x 0011 key-switch autorepeat delay is 40 debounce cycles 0x02 1 x x x 0100 key-switch autorepeat delay is 48 debounce cycles 0x02 1 x x x 0101 key-switch autorepeat delay is 56 debounce cycles 0x02 1 x x x 0110 key-switch autorepeat delay is 64 debounce cycles 0x02 1 x x x 0111 key-switch autorepeat delay is 72 debounce cycles 0x02 1 x x x 1000 key-switch autorepeat delay is 80 debounce cycles 0x02 1 x x x 1001 key-switch autorepeat delay is 88 debounce cycles 0x02 1 x x x 1010 key-switch autorepeat delay is 96 debounce cycles 0x02 1 x x x 1011 key-switch autorepeat delay is 104 debounce cycles 0x02 1 x x x 1100 key-switch autorepeat delay is 112 debounce cycles 0x02 1 x x x 1101 key-switch autorepeat delay is 120 debounce cycles 0x02 1 x x x 1110 key-switch autorepeat delay is 128 debounce cycles 0x02 1 x x x 1111 key-switch autorepeat frequency is 4 debounce cycles 0x02 1 0 0 0 xxxx key-switch autorepeat frequency is 8 debounce cycles 0x02 1 0 0 1 xxxx key-switch autorepeat frequency is 12 debounce cycles 0x02 1 0 1 0 xxxx key-switch autorepeat frequency is 16 debounce cycles 0x02 1 0 1 1 xxxx key-switch autorepeat frequency is 20 debounce cycles 0x02 1 1 0 0 xxxx key-switch autorepeat frequency is 24 debounce cycles 0x02 1 1 0 1 xxxx key-switch autorepeat frequency is 28 debounce cycles 0x02 1 1 1 0 xxxx key switch autorepeat frequency is 32 debounce cycles 0x02 1 1 1 1 xxxx power-up default setting 0x02 0 0000000 table 10. autorepeat register format MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers ______________________________________________________________________________________ 17 register data register address code (hex) d7 d6 d5 d4 d3 d2 d1 d0 interrupt register 0x03 int status * alert event * key- scan event * key-scan interrupt frequency current int is due to key-scan event(s) 0x03 1 0 1 x x x x x current int is due to alert event 0x03 1 1 0 x x x x x current int is due to both key-scan event(s) and alert event 0x03 1 1 1 x x x x x int has not been asserted 0x03 0 0 0 x x x x x int has been asserted 0x03 1 alert event key- scan event xxxxx int output pin is not asserted; int output pin is used as a general-purpose output called int port under control of bit d6 in ports register; int status bits d5, d6, d7 are still set and cleared in the normal way at the end of every debounce cycle as if bits d4?0 were set to 00001 0x03 x x x 0 0 0 0 0 key-scan int is asserted at the end of every debounce cycle, if new key(s) is debounced 0x03 x x x 0 0 0 0 1 key-scan int is asserted at the end of every 2 debounce cycles, if new key(s) is debounced 0x03 x x x 0 0 0 1 0 - key-scan int is asserted at the end of every 29 debounce cycles, if new key(s) is debounced 0x03 x x x 1 1 1 0 1 key-scan int is asserted at the end of every 30 debounce cycles, if new key(s) is debounced 0x03 x x x 1 1 1 1 0 key-scan int is asserted at the end of every 31 debounce cycles, if new key(s) is debounced 0x03 x x x 1 1 1 1 1 power-up default setting 0x03 00000000 table 11. interrupt register format * read-only register bits; write data is ignored. reading the interrupt register does clear an alert event int , but does not clear a key- scan event int . int caused by key-scan event(s) is cleared when fifo is emptied. MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers 18 ______________________________________________________________________________________ register data register address code (hex) d7 d6 d5 d4 d3 d2 d1 d0 configuration register 0x04 shutdown key sound enable alert sound enable alert int enable alert int event sounder status t i m eo u t en a b l e serial interface bus timeout enabled 0x04 x x x x x x x 0 serial interface bus timeout disabled 0x04 x x x x x x x 1 no active sounder output 0x04 x x x x x 0 0 x active sounder output set by serial interface 0x04 x x x x x 0 1 x active sounder output set by key debounce event 0x04 x x x x x 1 0 x active sounder output set by an alert event 0x04 x x x x x 1 1 x alert input interrupt (if enabled) is asserted according to key-scan interrupt rules 0x04 x x x x 0 x x x alert input interrupt (if enabled) is asserted immediately 0x04 x x x x 1 x x x alert input does not cause an interrupt 0x04 x x x 0 x x x x falling edge of alert input causes interrupt 0x04 x x x 1 x x x x alert input does not cause an automatic sound 0x04 x x 0 x x x x x falling edge of alert input causes the 8-bit contents of the alert sound register 0x07 to be sent to the sounder 0x04 x x 1 x x x x x debounce key(s) do not cause an automatic sound 0x04 x 0 x x x x x x debounced key(s), including autorepeated keys, cause the 8-bit contents of the key-sound register 0x06 to be sent to the sounder 0x04 x 1 x x x x x x table 12. configuration register format MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers ______________________________________________________________________________________ 19 register data register address code (hex) d7 d6 d5 d4 d3 d2 d1 d0 configuration register 0x04 shutdown key sound enable alert sound enable alert int enable alert int event sounder status t im eo u t en a b l e shutdown mode; key-scan and sounder timing are disabled, interrupts disabled, but alert input can be read and port outputs (as selected) can be changed 0x04 0 x x x x x x x operating mode; key scan is started, and commands in sounder queue are actioned 0x04 1 x x x x x x x power-up default setting 0x04 00000001 table 12. configuration register format (continued) register data register address code (hex) read write d7 d6 d5 d4 d3 d2 d1 d0 read port 7 port 6 port 5 port 4 port 3 port 2 int port alert input ports register 0x05 write port 7 port 6 port 5 port 4 port 3 port 2 int port x clear port 2 low 0x05 write x x x x x 0 x x set port 2 high (high impedance) 0x05 write x x x x x 1 x x clear port 3 low 0x05 write x x x x 0 x x x set port 3 high (high impedance) 0x05 write x x x x 1 x x x clear port 4 low 0x05 write x x x 0 x x x x set port 4 high (high impedance) 0x05 write x x x 1 x x x x clear port 5 low 0x05 write x x 0 x x x x x set port 5 high (high impedance) 0x05 write x x 1 x x x x x clear port 6 low 0x05 write x 0 x x x x x x set port 6 high (high impedance) 0x05 write x 1 x x x x x x table 13. ports register format MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers 20 ______________________________________________________________________________________ register data register address code (hex) read write d7 d6 d5 d4 d3 d2 d1 d0 read port 7 port 6 port 5 port 4 port 3 port 2 int port alert input ports register 0x05 write port 7 port 6 port 5 port 4 port 3 port 2 int port x clear port 7 low 0x05 write 0 x x x x x x x set port 7 high (high impedance) 0x05 write 1 x x x x x x x clear int port low; this setting is ignored unless the key-scan int functionality is disabled by setting interrupt register bits d4 to d0 to 00000 0x05 write x x x x x x 0 x set int port high (high impedance); this setting is ignored unless the key-scan int functionality is disabled by setting interrupt register bits d4 to d0 to 00000 0x05 write x x x x x x 1 x alert input level is low 0x05 read x x x x x x x 0 alert input level is high 0x05 read x x x x x x x 1 power-up default setting 0x05 1111111x table 13. ports register format (continued) register data register address code (hex) d7 d6 d5 d4 d3 d2 d1 d0 this-8 bit value is passed to sounder controller when key(s) debounced, if enabled in the configuration register; these 7 bits define duration and frequency only; sounder command bit d0 is ignored and fixed internally at 1; if a key sound is sent as 000xxxxx (continuous), then the command is stored as 111xxxxx (1000 ms) 0x06 7-bit value (see table 16 for functionality) 1 power-up default setting 0x06 01010001 table 14. key-sound register format MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers ______________________________________________________________________________________ 21 register data register address code (hex) d7 d6 d5 d4 d3 d2 d1 d0 this 8-bit value is passed to sounder controller on the falling edge of the alert input; these 7 bits define duration and frequency only; sounder command bit d0 is ignored and fixed internally at 1; if an alert sound is sent as 000xxxxx (continuous), then the command is stored as 111xxxxx (1000 ms) 0x07 7-bit value (see table 16 for functionality) 1 power-up default setting 0x07 10111011 table 15. alert sound register format register data register d7 d6 d5 d4 d3 d2 d1 d0 sounder register read write duration frequenc level buffer no commands are active; or output is gpo logic 0 read 0 0 0 0 0 0 0 0 this current command is active, none are queued (so another command may be sent) read duration frequency level 0 this current command is active, and another command is in the queue read duration frequency level 1 perform this command, terminating and clearing any previous active command, command queue, and autoloop; new command is now active, and queue is now empty write x x x x x x x 0 add command to queue if not full; command replaces queued command if queue is full write x x x x x x x 1 configure sounder output as general-purpose output, logic 0 (clear queue; sounder output active low with continuous duration, ie, until a buffer = 0 command) write 0 0 0 0 0 0 0 0 configure sounder output as general-purpose output, logic 1 (clear queue; sounder output active high with continuous duration, ie, until a buffer = 0 command) write 0 0 0 0 0 0 1 0 autoloop using the current two commands; the active command is command 1, and the inactive command is command 2; if no command is active, the oldest command is reactivated as command 1, and the other command is re- activated as command 2 write 0 0 0 0 0 0 0 1 autoloop is halted at the end of command 2, and output idles as defined by command 2 write 0 0 0 0 0 0 1 1 table 16. sounder register format MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers 22 ______________________________________________________________________________________ register data register d7 d6 d5 d4 d3 d2 d1 d0 sounder register read write duration frequency level buffer sounder output active low for sound duration; queue cleared write 0 0 0 0 0 sounder output active high for sound duration; queue cleared write 0 0 0 1 0 sound frequency is 523.25hz, idles low note c5 write 0 0 1 0 sound frequency is 587.33hz, idles low note d5 write 0 0 1 1 sound frequency is 659.26, idles low note e5 write 0 1 0 0 sound frequency is 698.46hz, idles low note f5 write 0 1 0 1 sound frequency is 783.99hz, idles low note g5 write 0 1 1 0 sound frequency is 880hz, idles low note a5 write 0 1 1 1 sound frequency is 987.77hz, idles low note b5 write 1 0 0 0 sound frequency is 1046.5hz, idles low note c6 write 1 0 0 1 sound frequency is 1318.5hz, idles low note e6 write 1 0 1 0 sound frequency is 1568hz, idles low note g6 write 1 0 1 1 sound frequency is 1760hz, idles low note a6 write 1 1 0 0 sound frequency is 2093hz, idles low note c7 write 1 1 0 1 sound frequency is 2349.3hz, idles low note d7 write 1 1 1 0 sound frequency is 2637hz, idles low note e7 write duration 111 1 buffer sound duration is continuous; if an alert sound or a key sound is programmed as 000xxxxx (continuous), then the command is treated as 111xxxxx (1000 ms) write 0 0 0 sound duration is 15625ms* write 0 0 1 sound duration is 3125ms* write 0 1 0 sound duration is 625ms* write 0 1 1 sound duration is 125ms* write 1 0 0 sound duration is 250ms* write 1 0 1 sound duration is 500ms* write 1 1 0 sound duration is 1000ms* write 1 1 1 frequency level buffer power-up default setting 000000 0 0 table 16. sounder register format (continued) * sound duration will be slightly longer than these times because each sound always completes a full cycle before stopping. MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers ______________________________________________________________________________________ 23 sounder operation when an alert sound or key sound is happening, the user cannot write to the sounder. the MAX7347/max7348/ max7349 do not acknowledge a write to the sounder i 2 c address. however, a read from the sounder will work cor- rectly. an alert sound or key sound event terminates a current user-programmed event and clears the queue. if an alert sound or key sound event is currently being processed, then a new alert sound or key sound event will be put into the queue, replacing an existing queued alert sound or key sound event, if one exists. user access to the sounder is restored when the last alert sound or key sound event is completed. note this means that the buffer bit (d0) for an alert sound or key sound command is effectively ignored. shutdown the MAX7347/max7348/max7349 are put into shut- down mode by clearing bit d7 in the configuration reg- ister (table 12). in shutdown, the key-scan controller and sounder controller are both disabled, and the MAX7347/max7348/max7349 draw minimal current. no additional supply current is drawn if any keys are pressed. all switch matrix current sources are turned off, and row outputs row0 to row7 and column out- puts col0 to col7 become high impedance. the alert input status may still be read in shutdown, and an alert event can still cause an interrupt request if this feature is enabled (table 12). this means that alert can be used for ? wakeup while the system sleeps drawing minimum current. outputs configured as gpos (col2/port2 to col2/port7 and int ) may still be controlled in shut- down and their output states can be changed under software control at any time. the sounder output may not be changed in shutdown, even if it is effectively being used as a logic output. writes to the sounder during shutdown are ignored, and the sounder fifo is cleared on entering shutdown. however, the sounder retains its output logic state for the duration of shutdown, and so can be set low or high as desired by writing 0x00 or 0x02, respectively, to the sounder register (table 12) before entering shutdown. the MAX7347/max7348/max7349 may be taken out of shutdown mode and put into operating mode by setting bit d7 in the configuration register (table 12). the key- scan and sounder controller fifos are cleared, and key monitoring starts. note that rewriting the configuration register with bit d7 high when bit d7 was already high does not clear the fifos; the fifos are only cleared when the MAX7347/max7348/max7349 are actually coming out of shutdown. applications information ghost-key elimination ghost keys are a phenomenon inherent with key-switch matrices. when three switches located at the corners of a matrix rectangle are pressed simultaneously, the switch that is located at the last corner of the rectangle (the ghost key) also appears to be pressed. this occurs because the potentials at the two sides of the ghost-key switch are identical due to the other three connections the switch is electrically shorted by the combination of the other three switches (figure 10). because the key appears to be pressed electrically, it is impossible for software to detect which of the four keys is the ghost key. the MAX7347/max7348/max7349 employ a proprietary scheme that detects any three-key combination that generates a fourth ghost key, and does not report any of these four keys as being pressed. this means that although ghost keys are never reported, many combina- tions of three keys are effectively ignored when pressed at the same time. applications requiring three key com- binations (such as MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers 24 ______________________________________________________________________________________ audio transducers the sounder output is designed to drive a standard, low- cost piezo transducer directly without further buffering. piezo transducers appear as a capacitive load of typical- ly 10nf. if a resistive or inductive sounder is used, such as a small loudspeaker, fit a coupling capacitor between the sounder output and the transducer. for example, if a 32 speaker is used, connect the positive side of a 22? electrolytic capacitor to the sounder output, the negative side of the capacitor to one end of the speaker, and the other end of the speaker to gnd. the sounder output can also drive a power amplifier for higher sound levels. in this case, it is usually desirable to include a lowpass filter before the speaker to convert the square-wave tones to something closer to a sinu- soid. the recommended cutoff frequency of this filter is around 3khz. an example circuit is shown in figure 12, which uses the uncommitted op amp of the max4366 bridge power amplifier to implement a third-order chebyshev lowpass filter. regular key-press event ghost-key event key-switch matrix figure 10. ghost-key phenomenon key-switch matrix key-switch matrix examples of valid three-key combinations figure 11. valid three-key combinations chip information process: bicmos 21.5k 32.4k 22nf sounder output shutdown 2.61k 68nf 21.5k 220pf in- in+ shdn bias 10k 10k 50k 50k v cc out- out+ 0.22 f 16 max4366 figure 12. third-order chebyshev lowpass filter and output stage MAX7347/max7348/max7349 max7348 row0 row1 row2 row3 row4 row5 row6 row7 col0 col1 col2/port2 gnd v+ col3/port3 col4/port4 ad0 scl sda int scl sda int 3.3v gnd v+ 3.3v 3.3v 5v sounder piezoelectric transducer key 0 key 1 key 2 key 3 key 4 key 5 key 6 key 7 key 8 key 9 key 10 key 11 key 12 key 13 key 14 key 15 key 16 key 17 key 18 key 19 key 20 key 21 key 22 key 23 typical application circuit 2-wire interfaced low-emi key switch and sounder controllers ______________________________________________________________________________________ 25 MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers 26 ______________________________________________________________________________________ 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 v+ scl sda row3 row2 row1 row0 top view ad0 gnd sounder col0 row5 row4 col4/port4 col3/port3 12 11 9 10 col1 col2/port2 row7 row6 max7348 qsop int + 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 alert v+ scl row2 row1 row0 col7/port7 top view sda ad0 gnd sounder row4 col4/port4 col3/port3 row3 16 15 14 13 9 10 11 12 col0 col1 col2/port2 col5/port5 col6/port6 row7 row6 row5 qsop max7349 int + pin configurations 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 row0 v+ scl sda gnd col0 col1 col2/port2 top view MAX7347 qsop int row1 row2 row5 row3 row4 row6 row7 + max7349 19 20 21 22 12 3456 18 17 16 15 14 13 23 24 12 11 10 9 8 7 int alert v+ col7/port7 row1 row2 row3 col3/port3 col4/port4 row4 row5 scl sda gnd sounder col0 row0 col1 col5/port5 col2/port2 col6/port6 row6 row7 ad0 top view tqfn-ep + ep* *ep = exposed paddle 15 16 14 13 6 5 7 row3 row5 8 row2 sda col0 scl 12 v+ 4 12 11 9 row0 row1 col1 col2/port2 row7 row6 ep* *ep = exposed paddle MAX7347 row4 gnd 3 10 int tqfn-ep top view + MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers ______________________________________________________________________________________ 27 package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) qsop.eps f 1 1 21-0055 package outline, qsop .150", .025" lead pitch MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers 28 ______________________________________________________________________________________ package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) 24l qfn thin.eps package outline, 21-0139 2 1 e 12, 16, 20, 24, 28l thin qfn, 4x4x0.8mm MAX7347/max7348/max7349 2-wire interfaced low-emi key switch and sounder controllers maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 29 2007 maxim integrated products is a registered trademark of maxim integrated products, inc. package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) package outline, 21-0139 2 2 e 12, 16, 20, 24, 28l thin qfn, 4x4x0.8mm revision history pages changed at rev 5: 1, 2, 23, 29 |
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